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my personal ocd

feature/2017
Christian Kroll 9 years ago
parent
cbc716683f
commit
70c7c567a6
2 changed files with 8 additions and 8 deletions
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  1. 8
      src/borg_hw/borg_hw_andreborg.c
  2. 8
      src/borg_hw/borg_hw_borg16.c

8
src/borg_hw/borg_hw_andreborg.c
View File

@ -19,18 +19,18 @@
defined(__AVR_ATmega644P__) || \ defined(__AVR_ATmega644P__) || \
defined(__AVR_ATmega1284__) || \ defined(__AVR_ATmega1284__) || \
defined(__AVR_ATmega1284P__) defined(__AVR_ATmega1284P__)
# define TIMER0_OFF() TCCR0A = 0; TCCR0B = 0 # define TIMER0_OFF() TIMSK0 &= ~(OCIE0A); TCCR0A = 0; TCCR0B = 0
# define TIMER0_CTC_CS256() TCCR0A = _BV(WGM01); TCCR0B = _BV(CS02) # define TIMER0_CTC_CS256() TCCR0A = _BV(WGM01); TCCR0B = _BV(CS02)
# define TIMER0_RESET() TCNT0 = 0 # define TIMER0_RESET() TCNT0 = 0
# define TIMER0_COMPARE(t) OCR0A = t # define TIMER0_COMPARE(t) OCR0A = t
# define TIMER0_INT_ENABLE() TIMSK0 = _BV(OCIE0A) # define TIMER0_INT_ENABLE() TIMSK0 |= _BV(OCIE0A)
# define TIMER0_ISR TIMER0_COMPA_vect # define TIMER0_ISR TIMER0_COMPA_vect
#else // ATmega16/32 #else // ATmega16/32
# define TIMER0_OFF() TCCR0 = 0 # define TIMER0_OFF() TIMSK0 &= ~(OCIE0); TCCR0 = 0
# define TIMER0_CTC_CS256() TCCR0 = _BV(WGM01) | _BV(CS02) # define TIMER0_CTC_CS256() TCCR0 = _BV(WGM01) | _BV(CS02)
# define TIMER0_RESET() TCNT0 = 0 # define TIMER0_RESET() TCNT0 = 0
# define TIMER0_COMPARE(t) OCR0 = t # define TIMER0_COMPARE(t) OCR0 = t
# define TIMER0_INT_ENABLE() TIMSK = _BV(OCIE0) # define TIMER0_INT_ENABLE() TIMSK |= _BV(OCIE0)
# define TIMER0_ISR TIMER0_COMP_vect # define TIMER0_ISR TIMER0_COMP_vect
#endif #endif

8
src/borg_hw/borg_hw_borg16.c
View File

@ -41,18 +41,18 @@
defined(__AVR_ATmega644P__) || \ defined(__AVR_ATmega644P__) || \
defined(__AVR_ATmega1284__) || \ defined(__AVR_ATmega1284__) || \
defined(__AVR_ATmega1284P__) defined(__AVR_ATmega1284P__)
# define TIMER0_OFF() TCCR0A = 0; TCCR0B = 0 # define TIMER0_OFF() TIMSK0 &= ~(OCIE0A); TCCR0A = 0; TCCR0B = 0
# define TIMER0_CTC_CS256() TCCR0A = _BV(WGM01); TCCR0B = _BV(CS02) # define TIMER0_CTC_CS256() TCCR0A = _BV(WGM01); TCCR0B = _BV(CS02)
# define TIMER0_RESET() TCNT0 = 0 # define TIMER0_RESET() TCNT0 = 0
# define TIMER0_COMPARE(t) OCR0A = t # define TIMER0_COMPARE(t) OCR0A = t
# define TIMER0_INT_ENABLE() TIMSK0 = _BV(OCIE0A) # define TIMER0_INT_ENABLE() TIMSK0 |= _BV(OCIE0A)
# define TIMER0_ISR TIMER0_COMPA_vect # define TIMER0_ISR TIMER0_COMPA_vect
#else // ATmega16/32 #else // ATmega16/32
# define TIMER0_OFF() TCCR0 = 0 # define TIMER0_OFF() TIMSK0 &= ~(OCIE0); TCCR0 = 0
# define TIMER0_CTC_CS256() TCCR0 = _BV(WGM01) | _BV(CS02) # define TIMER0_CTC_CS256() TCCR0 = _BV(WGM01) | _BV(CS02)
# define TIMER0_RESET() TCNT0 = 0 # define TIMER0_RESET() TCNT0 = 0
# define TIMER0_COMPARE(t) OCR0 = t # define TIMER0_COMPARE(t) OCR0 = t
# define TIMER0_INT_ENABLE() TIMSK = _BV(OCIE0) # define TIMER0_INT_ENABLE() TIMSK |= _BV(OCIE0)
# define TIMER0_ISR TIMER0_COMP_vect # define TIMER0_ISR TIMER0_COMP_vect
#endif #endif

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