borg_hw_ancient.c: streamlined driver for Peter's Ur-Borg

profiles/borg-ancient

@@ -5,7 +5,7 @@
 #
 # General Setup
 #
-MCU=atmega32
+MCU=atmega16
 FREQ=16000000
 
 #
@@ -21,6 +21,7 @@ BORG_HW=HW_ANCIENTBORG
 #
 COLPORT=PORTC
 ROWPORT=PORTA
+# WATCHDOG_ENABLED is not set
 
 #
 # Features

src/borg_hw/borg_hw_ancient.c

@@ -1,21 +1,18 @@
 #include <avr/interrupt.h>
 #include <avr/io.h>
-
+#include <avr/wdt.h>
-#undef WATCHDOG_ENABLED
-#ifdef WATCHDOG_ENABLED
-#  include <avr/wdt.h>
-#endif
-
 #include "../config.h"
 #include "../makros.h"
 #include "borg_hw.h"
 
+
 // define row port
 #ifndef ROWPORT
 #	define ROWPORT PORTA
 #endif
 #define ROWDDR DDR(ROWPORT)
 
+
 // define column port
 #ifndef COLPORT
 #	define COLPORT PORTC
@@ -23,20 +20,43 @@
 #define COLDDR DDR(COLPORT)
 
 
+// Timer0 control
+#if defined(__AVR_ATmega164__)   || \
+    defined(__AVR_ATmega164P__)  || \
+    defined(__AVR_ATmega324__)   || \
+    defined(__AVR_ATmega324P__)  || \
+    defined(__AVR_ATmega644__)   || \
+    defined(__AVR_ATmega644P__)  || \
+    defined(__AVR_ATmega1284__)  || \
+    defined(__AVR_ATmega1284P__)
+#	define TIMER0_OFF()        TIMSK0 &= ~(OCIE0A); TCCR0A = 0; TCCR0B = 0
+#	define TIMER0_CTC_CS64()   TCCR0A = _BV(WGM01); TCCR0B = _BV(CS01) | _BV(CS00)
+#	define TIMER0_RESET()      TCNT0  = 0
+#	define TIMER0_COMPARE(t)   OCR0A  = t
+#	define TIMER0_INT_ENABLE() TIMSK0 |= _BV(OCIE0A)
+#	define TIMER0_ISR          TIMER0_COMPA_vect
+#elif defined(__AVR_ATmega16__) || \
+      defined(__AVR_ATmega32__)
+#	define TIMER0_OFF()        TIMSK &= ~(OCIE0); TCCR0 = 0
+#	define TIMER0_CTC_CS64()   TCCR0 = _BV(WGM01) | _BV(CS01) | _BV(CS00)
+#	define TIMER0_RESET()      TCNT0 = 0
+#	define TIMER0_COMPARE(t)   OCR0  = t
+#	define TIMER0_INT_ENABLE() TIMSK |= _BV(OCIE0)
+#	define TIMER0_ISR          TIMER0_COMP_vect
+#else
+#   error MCU not supported
+#endif
+
+
 // buffer which holds the currently shown frame
 unsigned char pixmap[NUMPLANE][NUM_ROWS][LINEBYTES];
 
 
-ISR(TIMER0_COMP_vect)
+ISR(TIMER0_ISR)
 {
 	static unsigned char plane = 0;
 	static unsigned char row = 0;
 
-#ifdef WATCHDOG_ENABLED
-	// reset watchdog
-	wdt_reset();
-#endif
-
 	ROWPORT = 0;
 	row++;
 	if ((COLPORT <<= 1) == 0) {
@@ -46,6 +66,11 @@ ISR(TIMER0_COMP_vect)
 		if (++plane == NUMPLANE)
 		{
 			plane = 0;
+
+#ifdef WATCHDOG_ENABLED
+			// reset watchdog
+			wdt_reset();
+#endif
 		}
 	}
 
@@ -56,50 +81,28 @@ ISR(TIMER0_COMP_vect)
 	ROWPORT = pixmap[plane][row][0];
 }
 
+
 void timer0_off(){
 	cli();
 
 	COLPORT = 0;
 	ROWPORT = 0;
 
-#if defined (__AVR_ATmega644P__) || defined (__AVR_ATmega644__) || (__AVR_ATmega1284P__) || defined (__AVR_ATmega1284__)
+	TIMER0_OFF();
-	TCCR0A = 0x00;
-	TCCR0B = 0x00;
-	TIMSK0 = 0;
-#else
-	TCCR0 = 0x00;
-	TIMSK = 0;
-#endif
 
 	sei();
 }
 
-static void timer0_on(){
+
-/* 	TCCR0: FOC0 WGM00 COM01 COM00 WGM01 CS02 CS01 CS00
+// initialize timer which triggers the interrupt
-		CS02 CS01 CS00
+static void timer0_on() {
-		 0    0    0       stop
+	TIMER0_CTC_CS64();    // CTC mode, prescaling conforms to clk/64
-		 0    0    1       clk
+	TIMER0_RESET();       // set counter to 0
-		 0    1    0       clk/8
+	TIMER0_COMPARE(0x10); // compare with this value first
-		 0    1    1       clk/64
+	TIMER0_INT_ENABLE();  // enable Timer/Counter0 Output Compare Match (A) Int.
-		 1    0    0       clk/256
-		 1    0    1       clk/1024
-
-*/
-
-#if defined (__AVR_ATmega644P__) || defined (__AVR_ATmega644__) || (__AVR_ATmega1284P__) || defined (__AVR_ATmega1284__)
-	TCCR0A = 0x02; // CTC Mode
-	TCCR0B = 0x03; // clk/64
-	TCNT0  = 0x00; // reset timer
-	OCR0   = 0x0A; // compare with this value
-	TIMSK0 = 0x02; // compare match Interrupt on
-#else
-	TCCR0  = 0x0B; // CTC Mode, clk/64
-	TCNT0  = 0x00; // reset timer
-	OCR0   = 0x0A; // compare with this value
-	TIMSK  = 0x02; // compare match Interrupt on
-#endif
 }
 
+
 void borg_hw_init(){
 	// switch all pins of both the row and the column port to output mode
 	ROWDDR = 0xFF;
@@ -114,6 +117,6 @@ void borg_hw_init(){
 #ifdef WATCHDOG_ENABLED
 	// activate watchdog timer
 	wdt_reset();
-	wdt_enable(0x00); // 17ms watchdog
+	wdt_enable(WDTO_15MS); // 15ms watchdog
 #endif
 }

src/borg_hw/config_ancient.in

@@ -15,4 +15,6 @@ choice 'Row Port'			\
     PORTD  PORTD" \
    'PORTA' ROWPORT
 
+bool "Watchdog" WATCHDOG_ENABLED n
+
 endmenu